Using a Trace Table on a Low Level Program

In the following set of challenges, we will use a trace table to demonstrate the impact of the FDE cycle on the main registers:

• Program Counter (PC)
• Memory Address Register (MAR)
• Memory Data Register (MDR)
• Current Instruction Register (CIR)
• Accumulator (ACC)

Note that the following program are all based on the LMC language and are hence based on direct addressing.

To complete this task, you need to understand what happens inside the CPU at each stage of the FDE cycles. For instance:

• A the start of the Fetch stage of the FDE cycle, the PC contains the address of the next instruction to be Fetched. So the value of the PC is copied to the MAR so that the instruction can be retrieved from memory. The instruction stored at this MAR address will be stored in the MDR and immediately copied to the CIR.
• The PC is then automatically incremented by 1.
• What happens during the Execute stage of the FDE cycle will depend on the instruction itself.
• It may be that more data may be loaded from memory using the MAR and MDR (e.g. LDA, ADD, SUB instructions).
• It may be that the PC will be overridden by a BRP, BRZ or BRA instruction.
• The Accumulator may also be overwritten by an input value (INP), the result of executing a calculation (ADD, SUB) or of loading data from memory (LDA).

INP
STA 99
INP
ADD 99
OUT

INP
STA 99
INP
STA 98
SUB 99
BRP 08
LDA 99
BRA 09
LDA 98
OUT

INP
STA 99
LDA 99
SUB one
STA 99
OUT
BRP 3
HLT
one DAT 1